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Aceplorer

 

Aceplorer : a unique solution for maximizing power consumption saving

power management softare

DOCEA Power provides with Aceplorer the first electronic system level (ESL) solution for the modelling, exploration and optimization of power and thermal behaviour of any electronic systems architecture.

The solution answers the needs of system architects in charge of power optimization of on-chip (SoCs, SiPs, FPGAs, ASICs) or on-board (embedded systems) designs. Aceplorer allows the modelling of heterogeneous systems, with any mix of digital, analog or mixed signal blocks, and with different levels of models complexity. The result is a larger exploration of the design space for the best low power implementation strategy, which can take into account the embedded software impact on the design power consumption.


Aceplorer use

- Early exploration and optimization of power architecture and power management policies at the system level before implementation 

- Architecture validation by leveraging on ESL platforms and TLM simulations

- Power budget tracking during implementation phases by refining power models and use cases with most recent power data.  

- Faster power management software validation and debug by using system level dynamic simulations as a reference and compare to measurement for bug tracking

- Go beyond power estimation with thermal simulation and system level voltage drop analysis 


Click here to read more about Aceplorer use

Aceplorer_flow

Benefits

Save from 40 to 70% on power consumption

  • by exploring and optimizing hardware architectures and power management policies before implementation decisions

Improve teams productivity

  • one central framework to collect and organize all power related data for SoCs or chipsets
  • reuse-oriented power modeling and use case profiling
  • fast derivation of new platforms and SoCs  

Secure power specifications during implementation phases

  • by running all system dimensioning use cases with the most up-to-date power characterization data from all IP and IC owners
  • automatically generate analysis reports, specifications and UPF code for implementation teams

Faster time to market by reducing power management software debug and validation time

  • when silicon is ready, use the system level simulations as a reference and identify quickly power management bugs

Model, simulate and optimize Thermal Management policies

  • import compact RC thermal models generated with AceThermalModeler
  • run coupled thermal and power simulations with Aceplorer dedicated electro-thermal solver and temperature dependent power models
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