Aceplorer provides a unique and elegant way to explore and optimize the static and dynamic power and thermal behaviour of electronic systems’ architectures at the most abstract level, without interfering with functional or performance descriptions. This methodology approach helps designers in keeping debug time low on both performance and power models while optimizing the setup and simulation time for both domains.

 

Design space exploration

In a world where electronic systems embed more and more functions, and where the complexity and variety of possible use cases increases considerably from a generation to another, it also becomes important to explore the largest possible design space for an optimum use of a given architecture.

Aceplorer allows modelling the architecture separately from the use cases. This approach, combined with fast simulation times enabled by working at the system level, provides with the capability to explore the best low power strategies and the impact of the different use scenarios on both power and thermal behaviour.

 

Mixing heterogeneous models

At the system level, architects have to take into account very heterogeneous models when capturing their design ideas. Aceplorer supports modelling the power behaviour of any type of digital, analog or mixed signal blocks, but also any sensors, batteries, displays or any other block that is significant for the power consumption and for which the architect has any type of data.

Aceplorer allows mixing very complex and accurate models with simpler ones for any type of blocks (spreadsheet, datasheet, specification), and enables further refinement of the architecture modelling along the implementation flow.

 

When Temperature is an issue...

Aceplorer is the sole ESL tool to provide with a unified approach to both temperature and power consumption behaviour. This can be crucial for some systems where a strong coupling between temperature and power can lead to performance degradations or where temperature must be constrained due to the system environment.

Dynamic thermal models capturing the behaviour of the packaging, the substrate or the cooling system can be implemented in Aceplorer. A dedicated solver allows solving the loop between temperature and power, and enables risk analysis assessment (IR drops, peak temperature, power budget across the temperature range) at the architectural level, avoiding costly redesign at later stages.

 

Explore, optimize, secure and communicate

Aceplorer provides system architects with a complete framework for exploring and optimizing the power and thermal behaviour of any electronic system architecture starting from complex IP blocks to system-on-chips, to system-in-packages and platforms or end products. This unique framework enables true collaborative design between teams and across design chain levels.

Architects are not only able to use and exchange the same model, but at each level, they are also provided with a rich set of graphs and metrics to enable an efficient communication and a comprehensive documentation to both “customers” and design teams.

Aceplorer also outputs automatically UPF specifications used in further implementation stages, which limits the risk of miscommunication on the power intent of each design block.

With Aceplorer system architects should be all set to explore, optimize, secure and communicate on the power and thermal behaviour of their architectures.