Come to see us!

DAC : June 5-10, 2011 at San Diego, California. Booth No. 1912.

D43D : June 29 - July 1, 2011 at Minatec, Grenoble, France.

EDS Fair : November 16 - 18, 2011 at Pacifico Yokohama, Japan.

Recent events

DATE, March 14-18 in Grenoble, France

Our presence at DATE has been remarkable with a well-attended and well placed booth right at the entrance of the exhibition space. DATE this year, was held in Grenoble, home of Docea Power. The show is an excellent opportunity for the EDA community to showcase their latest innovations to the European design and test community. This year has shown a strong growth for the show both in attendance and exhibitors.

 

SNUG, March 28 in Santa Clara, California

As Docea Power has joined the ESL Catalyst program, we have had the opportunity for the first time to exhibit at SNUG, Synopsys Users Group for the ESL community part of the event. Ghislain Kaiser, co-founder and CEO of Docea Power has been interviewed during the show by Graham Bell from EDA Cafe.

 

EDS Fair, January 27-28 in Yokohama, Japan

2011 is definitely a year of many first times for Docea Power. Indeed for the first time, we have been participating with a booth at EDS Fair, the major EDA event in Japan. As power optimization at the architectural level is a hot topic in the industry, our booth was well attended. We are definitely considering attending the next EDS Fair. The recent developments in Japan can only encourage us to support the Japanese economy.

Docea Power has joined the Synopsys System-Level Catalyst program to ensure the interoperability of its Aceplorer tool with Synopsys System-Level solutions. Developing the interoperability of Aceplorer with performance estimation tools increases the productivity of the system architecture team and makes power estimations done at the architectural level more accurate when virtual platforms are available. Read the full press release.

  CIM-PACA offers access to Aceplorer license for R&D collaborative projects
 

Sales distribution agreement with Korea
 

 Docea Power is happy to announce that it has signed a sales and distribution agreement with Saline Co. from Korea to address the Korean market. Korea is home to major mobile handsets and tablet PC manufacturers. Power management and saving is on the top list of their concerns.

 

EDN China writes on Docea Power in Chinese, an article signed by Sunray Zhaouihui  Liu.

Several web sites and blogs written in Mandarin Chinese have referred to the link including EE-Times China. We thank Mr Liu for his paper.

TechOn writes on Docea Power in Japanese.

Following the first participation of Docea Power to EDS Fair, held in Yokohama, Japan, TechOn has grated us with an article in Japanese! For Japanese customers, our sales and technical support is managed by HDLAB, a very well respected partner in the ESL community in Japan.

How Software development can take benefit of a platform power model?

A presentation by Patrick Arnould, Senior System Architect  for Mobile platform at ST-Ericsson during DATE, the Design Automation and Test in Europe. This presentation has been showcasing a use of Aceplorer for optimizing the validation of a wireless platform’s power management software. This testimonial opens a whole new range of use for Aceplorer power models.

Contact us if you are interested in the presentation.

The abstract of the talk is available herein below: The increasing complexity of applications running on multimedia mobile platforms is becoming more and more critical for battery life, so software optimization to take into account power consumption is crucial but could become very painful without a dedicated environment. A lot of power saving is possible at the software level but the investigations are complex due to the number of parameters involved in this optimization: clock gating, dynamic power switching, dynamic voltage and frequency scaling, traffic, CPU and IP load. In this testimonial, a validation environment will be used as an example to show the benefit for software developers to have access to a combination of CPU load, traffic and power figures phase per phase and power supply per power supply. It also outlines the challenges for a power modeling methodology to be able to target a wide range of applications, very low power and power hungry systems optimization. Taking the benefits of having a platform power model and before starting any software development, key decisions can be taken to focus very quickly on the best software option to gain power. The testimonial scope goes from power model construction to fast software optimization on a real application showing the benefit to speed up software development and platform power optimization.

PRODUCTS UPDATE

  Aceplorer 2.2 now available

Docea Power has announced during DATE 2011 the availability of its newest version of Aceplorer, release 2.2. Major highlights of this release are the availability of a new library of generic blocks that can be customized by the users in order to rapidly capture a new design and build power model libraries.

Aceplorer 2.2 also outputs UPF 2.0, a way for Architects to secure a safe communication of their specifications to the implementation or realization teams. The first UPF file in the flow is often written by hand, a step that is prone to errors and tedious for the architects to perform. By automating this process, Aceplorer 2.2 helps in eliminating risks of errors. Its easy-to-understand UPF file editor allows a good sharing of the information within the different teams and reduces the risks of misunderstandings between teams.

Continuous efforts have been put to enhance the framework’s usability by improving the graphical user interface and the project management capabilities in order to easily instantiate, aggregate and share libraries and designs within different teams.

If you are interested in a demo or a presentation of our solutions, please do not hesitate to contact us.